In a fabrication of metal routes, particularly a fabrication of metal routes using SADP technology, metal routes are typically placed on one of many pre-determined gridded routing tracks. Such routing tracks are frequently spaced to efficiently utilize space on an IC layout and to obtain adequate performance, reliability, and manufacturability of the resulting device. However, off-grid routing may become necessary to allow flexible pin access, redundant via/via bar insertion, and metal transition. Unfortunately, traditional methods place off-grid metal islands between routing tracks, resulting in inefficient use of IC layouts utilizing SADP technology. For instance, some methods require four tracks for insertion of a single off-grid metal island between routing tracks.
A need therefore exists for methodology enabling efficient off-track routing for ICs utilizing SADP technology, and the resulting device.